Siemens EDA Illuminates the Complexity of PCB Design
西门子EDA揭示PCB设计的复杂性
➀ 文章探讨了异构多芯片设计的兴起如何将焦点转移到高级分析上，但强调不应忽视完整系统构建的重要性。
➁ 关键挑战包括管理PCB设计中的短距离和长距离通信通道以及系统级电源管理。
➂ 西门子EDA提供见解和解决方案，以应对现代电子系统中日益复杂的PCB设计。
半导体行业最新 #Siemens EDA 相关新闻
Addressing Silent Data Corruption (SDC) with In-System Embedded Deterministic Testing
利用系统内嵌入式确定性测试解决静默数据损坏（SDC）问题
➀ 静默数据损坏（SDC）是AI数据中心面临的关键问题，由硬件缺陷导致且难以被检测，进而引发计算错误；
➁ 博通（Broadcom）与西门子EDA在台积电OIP 2025活动上展示了一种联合解决方案，通过系统内嵌入式确定性测试来检测和定位故障；
➂ 该方法通过在操作系统环境中直接提供确定性测试能力，提升了高性能计算（HPC）的系统可靠性。
Addressing Silent Data Corruption (SDC) with In-System Embedded Deterministic Testing
利用系统内嵌入式确定性测试解决静默数据损坏（SDC）问题
➀ 静默数据损坏（SDC）是AI数据中心面临的关键问题，由硬件缺陷导致且难以被检测，进而引发计算错误；
➁ 博通（Broadcom）与西门子EDA在台积电OIP 2025活动上展示了一种联合解决方案，通过系统内嵌入式确定性测试来检测和定位故障；
➂ 该方法通过在操作系统环境中直接提供确定性测试能力，提升了高性能计算（HPC）的系统可靠性。
Accelerating SRAM Design Cycles: MediaTek’s Adoption of Siemens EDA’s Additive AI Technology at TSMC OIP 2025
加速SRAM设计周期：联发科在台积电OIP 2025采用西门子EDA的Additive AI技术
➀ SRAM occupies nearly 40% of mobile SoC chip area, with traditional Monte Carlo simulations being computationally intensive and causing delays in iterative design cycles;
➁ Siemens EDA's Solido tools integrate Additive Learning technology, reusing AI models and simulation data to drastically reduce verification simulations while maintaining SPICE-level accuracy, achieving 20-67x speedups;
➂ MediaTek's real-world cases validate its efficiency on TSMC's N2P process, exemplifying AI's potential in semiconductor workflows for future nodes.
Accelerating SRAM Design Cycles: MediaTek’s Adoption of Siemens EDA’s Additive AI Technology at TSMC OIP 2025
加速SRAM设计周期：联发科在台积电OIP 2025采用西门子EDA的Additive AI技术
➀ SRAM occupies nearly 40% of mobile SoC chip area, with traditional Monte Carlo simulations being computationally intensive and causing delays in iterative design cycles;
➁ Siemens EDA's Solido tools integrate Additive Learning technology, reusing AI models and simulation data to drastically reduce verification simulations while maintaining SPICE-level accuracy, achieving 20-67x speedups;
➂ MediaTek's real-world cases validate its efficiency on TSMC's N2P process, exemplifying AI's potential in semiconductor workflows for future nodes.